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Logical Group Instructions (Part-VI) - RLC, RRC, RAL, RAR

RLC: This instruction rotates the contents of accumulator to the left by one bit. It will shift B0 to B1, B1 to B2,............B7 to B0 as well as to carry flag . Only CY flag is modified. It is a one byte instruction. Implied addressing mode is used. Before execution: After execution: Example: If A = 0101 0111 = 57H and CY = 1 RLC ; Now A = 10101110 = AEH and CY = 0. RRC: This instruction rotates the contents of accumulator to the right by one bit. It will shift B7 to B6, B6 to B5,............B0 to B7 as well as to carry flag. Only CY flag is modified. It is a one byte instruction. Implied addressing mode is used. Before execution: After execution: Example: If A = 1001 1010 = 9AH and CY = 1 RLC ; Now A = 0100 1101 = 4DH and CY = 0. RAL: This instruction rotates the contents of accumulator to the left by one bit along with the carry . It will shift B0 to B1, B1 to B2,............B7 to CY and CY to B0 . Only CY flag is modifi...

Logical Group Instructions (Part-V) - CMA, CMC, STC

CMA: This instruction complements the contents of the accumulator. The result is stored in the accumulator. Only CY flag is modified. It is a one byte instruction. Implied addressing mode is used. Example: If A= 1000 1000 = 88H CMA ; This instruction will complement each bit A= 0111 0111 = 77H. CMC: This instruction complements the carry flag. If CY = 1 then this instruction will make CY = 0. Only CY flag is modified. It is a one byte instruction. Implied addressing mode is used. Example: If CY=1 CMC ; This instruction complements the CY flag CY=0. STC: This instruction sets the carry flag. This will make CY=1. Only CY flag is modified. It is a one byte instruction. Implied addressing mode is used. Example: STC ; This instruction will set CY flag CY=1.

Logical Group Instructions (Part-IV) - CMP and CPI

CMP R: This instruction compares the contents of the specified register with the contents of the accumulator. This comparison is performed by subtracting the contents of the specified register from the contents of the accumulator. Register R can be any 8-bit general purpose register like A, B, C, D, E, H and L. If A=R, then CY=0 and Z=1. If A>R, then CY=0 and Z=0. If A<R, then CY=1 and Z=0. S, AC and P are modified to reflect the status of subtraction. Z and CY are used to indicate the result of comparison. It is a one byte instruction. Register addressing mode is used. Example: If A = 12H and B = 14H  CMP B ; This instruction will compare the contents of A and B and since A<B, carry flag will set. CMP M: This instruction compares the contents of the memory location pointed by HL register pair with the contents of the accumulator. This comparison is performed by subtracting the contents of the memory location from the contents of the accumulator. ...

Logical Group Instructions (Part-III) - XRA and XRI

XRA R:  This instruction logically EX-OR the contents of the specified register with the contents of the accumulator. Register R can be any 8-bit general purpose register like A, B, C, D, E, H and L. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) and AC (Auxiliary Carry flag) are reset. It is a one byte instruction. Register addressing mode is used. Example: If A = 1010 1011 = ABH and D = 0001 0010 = 12H XRA D ; This instruction will logically EX-OR the contents of A (ABH) with the contents of D (12H) and the result (B9H) is stored in A. XRA M: This instruction logically EX-OR the contents of the memory location pointed by HL register pair with the contents of the accumulator. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) and AC (Auxiliary Carry flag) are reset. It is a one byte instruction. Register indirect addr...

Logical Group Instructions (Part-II) - ORA and ORI

ORA R:  This instruction logically OR the contents of the specified register with the contents of the accumulator. Register R can be any 8-bit general purpose register like A, B, C, D, E, H and L. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) and AC (Auxiliary Carry flag) are reset. It is a one byte instruction. Register addressing mode is used. Example: If A = 1010 1011 = ABH and L = 1000 0111 =87H ORA L ; This instruction will logically OR  the contents of A (ABH) with the contents of L (87H) and the result (AFH) is stored in A. ORA M: This instruction logically OR the contents of the memory location pointed by HL register pair with the contents of the accumulator. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) and AC (Auxiliary Carry flag) are reset. It is a one byte instruction. Register indirect addressing...

Logical Group Instructions (Part-I) - ANA and ANI

ANA R:  This instruction logically AND the contents of the specified register with the contents of the accumulator. Register R can be any 8-bit general purpose register like A, B, C, D, E, H and L. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) is reset and AC (Auxiliary Carry flag) is set. It is a one byte instruction. Register addressing mode is used. Example: If A = 0101 1001 = 59H and B = 0000 0011 = 03H ANA B ; This instruction will logically AND the contents of A (59H) with the contents of B (03H) and the result (01H) is stored in A. ANA M: This instruction logically AND the contents of the memory location pointed by HL register pair with the contents of the accumulator. The result is stored in the accumulator. S (Sign flag), Z (Zero flag), P (Parity flag) are modified. CY (Carry flag) is reset and AC (Auxiliary Carry flag) is set. It is a one byte instruction. Register indirect a...

Arithmetic Group Instructions (Part-VI)

DCR R: This instruction decrements the contents of specified register by 1. The result is stored in the same register. Register R can be any general purpose register like A, B, C, D, E, H and L. All flags are modified except carry flag. It is a one byte instruction. Register addressing mode is used. Example: If H = 20H DCR H ; This instruction decrements the contents of H (20H) by one and the result (1FH) is stored in H. DCR M: This instruction decrements the contents of the memory location pointed by HL register pair by 1. The result is stored in the same memory location. All flags are modified except carry flag. It is a one byte instruction. Register indirect addressing mode is used. Example: If HL = 2000H, (2000H) = 20H DCR M ; This instruction decrements the contents of location 2000H i.e. 20H by one and the result (1FH) is stored in location 2000H. DCX Rp: This instruction decrements the contents of the specified register pair by 1. The resul...

Arithmetic Group Instructions (Part-V)

INR R: This instruction increments the contents of specified register by 1. The result is stored in the same register. Register R can be any general purpose register like A, B, C, D, E, H and L. All flags are modified except carry flag. It is a one byte instruction. Register addressing mode is used. Example: If B = 50H INR B ; This instruction increments the contents of B (50H) by one and the result (51H) is stored in B. INR M: This instruction increments the contents of the memory location pointed by HL register pair by 1. The result is stored in the same memory location. All flags are modified except carry flag. It is a one byte instruction. Register indirect addressing mode is used. Example: If HL = 1000H and (1000H) = 20H INR M ; This instruction increments the contents of location 1000H i.e. 20H by one and the result (21H) is stored in location 1000H. INX Rp: This instruction increments the contents of the specified register pair by 1. The res...

Arithmetic Group Instructions (Part-IV)

SUI 8-bit data: This instruction subtracts the 8-bit data given in the instruction from the contents of the accumulator. The result is stored in accumulator. All flags are modified. It is a two byte instruction. Immediate addressing mode is used. Example: If A = 50H SUI 10H ; This instruction subtracts 10H from the contents of A (50H) and the result (40H) is stored in A. SBI 8-bit data: This instruction subtracts the 8-bit data given in the instruction and the borrow flag from the contents of the accumulator. The result is stored in accumulator. All flags are modified. It is a two byte instruction. Immediate addressing mode is used. Example: If CY = 1 and A = 50H SBI 20H ; This instruction subtracts 20H and carry (1) from the contents of A (50H) and the result (2FH) is stored in A. DAA: It stands for Decimal Adjust Accumulator. This instruction adjusts accumulator to packed BCD after adding two BCD numbers. If the value of low order four bi...

Arithmetic Group Instructions (Part-III)

SUB R: This instruction subtract the contents of specified register from the contents of the accumulator. Register R can by any general purpose register like A, B, C, D, E, H and L. The result is stored in accumulator. Subtraction is performed by 2's complement method. All flags are affected. It is a one byte instruction. Register addressing mode is used. Example: If A =50H and C = 30H SUB C ; This instruction subtracts the contents of C (30H) from the contents of A (50H) and the result (20H) is stored in A. SUB M: This instruction subtract the contents of the memory location pointed by HL register pair from the contents of the accumulator. The result is stored in accumulator. Subtraction is performed by 2's complement method. All flags are affected. It is a one byte instruction. Register indirect addressing mode is used. Example: If HL = 1000H, (1000H) = 10H and A = 40H SUB M ; This instruction subtracts the contents of location 1000H i.e. 10...

Arithmetic Group Instructions (Part-II)

ADI 8-bit data: This instruction adds the 8-bit data given within the instruction itself to the contents of the accumulator. The result is stored in the accumulator. All flags are modified. It is a two byte instruction. Immediate addressing mode is used. Example: If A = 20H ADI 56H ; This instruction adds the contents of A (20H) to 56H and result 76H is stored in A. ACI 8-bit data: This instruction adds the 8-bit data given within the instruction itself and the carry flag to the contents of the accumulator. The result is stored in the accumulator. All flags are modified. It is a two byte instruction. Immediate addressing mode is used. Example: If A = 30H and CY = 1 ACI 20H ; This instruction adds the contents of A (30H) to 20H with carry (1) and result 51H is stored in A. DAD Rp: This instruction adds the contents of specified register pair to the contents of HL register pair. The result is stored in HL register pair. Rp is 16-bit register pair lik...

Arithmetic Group Instructions (Part-I)

ADD R:  This instruction adds the contents of register R with the contents of the accumulator. Register R can be any general purpose register like A, B, C, D, E, H and L. The result is stored in the accumulator. All the flags are modified. It is a one byte instruction. Register addressing mode is used. Example: If A = 30H and B = 10H ADD B ; This instruction adds the contents of A i.e. 30H to the contents of B i.e. 10H and the result i.e. 40H is stored in A. ADD M: This instruction adds the contents of the memory location pointed by HL register pair with the contents of the accumulator. The result is stored in the accumulator. All the flags are modified. It is a one byte instruction. Register indirect addressing mode is used. Example: If HL = 2000H, (2000H) = 50H and A = 10H ADD M ; This instruction adds the contents of memory location 2000H i.e. 50H to the contents of A i.e. 10H and result 60H is stored in A. ADC R:  This instruction adds the...

Data Transfer Group Instructions (Part-IV)

LDAX Rp: This instruction copies the contents of memory location to the accumulator. The address of the memory location is not given in the instruction directly. The address of the memory location is given by Rp register pair. The register pair can be BC or DE only. Only high order register is specified for register pair. No flags are affected. It is a one byte instruction. Indirect addressing mode is used. Example: If BC = 2000H and (2000H) = 30H LDAX B ; This instruction loads the contents of memory location 2000H i.e. 30H into A. If DE = 4200H and (4200H) = A4H LDAX D ; This instruction loads the contents of memory location 4200H i.e. A4H into A. STAX Rp:  This instruction copies the contents of accumulator to the memory location. The address of the memory location is not given in the instruction directly. The address of the memory location is given by Rp register pair. The register pair can be BC or DE only. Only high order register is specifie...

Data Transfer Group Instructions (Part-III)

LDA addr:  This instruction copies the contents of the memory location to the accumulator. The address of the memory location is given in the instruction itself. No flags are modified. It is a three byte instruction. Direct addressing mode is used. Example: If (5600H) = 20H LDA 5600H ; This instruction loads the contents of location 5600H i.e. 20H into A. If (1000H) = 1FH LDA 1000H ; This instruction loads the contents of location 1000H i.e. 1FH into A. STA addr:  This instruction stores the contents of the accumulator in the memory location. The address of the memory location is given in the instruction itself. No flags are modified. It is a three byte instruction. Direct addressing mode is used. Example: If A = 34H STA 5800H ; This instruction copies the contents of A i.e. 34H to location 5800H. If A = 32H STA 1500H ; This instruction copies the contents of A i.e. 32H to location 1500H. LHLD addr:  This instruction copie...

Data Transfer Group Instructions (Part-II)

MVI R, 8-bit data: This instruction moves the 8-bit immediate data to the specified register. This data is given in the instruction itself. R can be any 8-bit general purpose register like A, B, C, D, E, H and L. No flags are affected. It is a two byte instruction. Immediate addressing mode is used in this instruction. Example: MVI C, 09H MVI H, 34H MVI M, 8-bit data:  This instruction moves the 8-bit immediate data to the memory location pointed by HL register pair. No flags are affected. It is a two byte instruction. Immediate and indirect addressing mode is used in this instruction. Example: MVI M, 35H MVI M, 20H LXI Rp, 16-bit data: This instruction moves the 16-bit data to the register pair. Only high order register is specified for register pair. Rp can be BC, DE, HL or SP. No flags are affected. It is a three byte instruction. Immediate addressing mode is used in this instruction. Example: LXI B, 2030H ; This instruction will l...

Data Transfer Group Instructions (Part-I)

MOV Rd, Rs :   This instruction copies data from source register Rs to destination register Rd.  Source and destination register can be any 8-bit general purpose register like A, B, C, D, E, H and L.  Contents of source register remain unchanged. No flags are affected. It is a one byte instruction. Register addressing mode is used in this instruction. Example: MOV B, C MOV D, H MOV R, M:  This instruction copies data from memory location pointed by HL register pair to register R.  R can be any 8-bit general purpose register like A, B, C, D, E, H and L. No flags are affected. It is a one byte instruction. Indirect addressing mode is used in this instruction. Example: MOV C, M MOV H, M MOV M, R:  This instruction copies the data from register R to the memory location pointed by HL register pair. R can be any 8-bit general purpose register like A, B, C, D, E, H and L. No flags are affected. It is a one byte instructio...

Instruction Classification

8085 microprocessor instructions can be categorized into five different groups: Data transfer operations group Arithmetic operations group Logical operations group Branch operations group Stack, Input/Output and Machine control operations group Data transfer operations group:  Data transfer instructions transfer data or copy data from source to destination.  Source can be any data or contents of memory location or contents of any register.  Destination can be register or memory location.  These instructions do not affect the flag register. Arithmetic operations group: Arithmetic instructions perform: addition  subtraction  increment decrement operations. Logical operations group: The logical instructions perform: logical operations like AND, OR, EX-OR rotate operation compare operation complement operation Branch operations group: These instructions allow 8085 processor to change the sequence of the p...

Program to right shift data within the 8-bit register

Statement: Shift an 8-bit data four bits right. The data is stored in register B. Example: If Register B = 90H Then after shifting four bits right, register B = 09H Program: MOV A, B            ; Move the contents of B register into A     RAR                     ; Rotate  right  RAR                      ; Rotate  right RAR                     ; Rotate  right RAR                     ; Rotate  right MOV B, A            ; Move the contents of A into B register HLT                       ; Terminate program execution

Program to unpack the BCD number

Statement: Unpack the two digit BCD number which is stored in memory location 2000H and store the two digits in memory locations 2001H and 2002H such that the lower BCD digit is stored in memory location 2001H. Example: (2000H) = 94H Result = (2001H) = 04H and (2002H) = 09H Program: LDA 2000H                        ; Obtain the packed BCD number RRC                                    ; Rotate right  RRC                                    ; Rotate right  RRC                                    ; Rotate right   RRC                                ...

Program to pack the two unpacked BCD numbers

Statement: Pack the two unpacked BCD numbers stored in memory locations 2000H and 2001H and store the result in memory location 2002H. The least significant digit is stored at 2000H. Example: (2000H) = 04H (2001H) = 09H Result = (2002H) = 94H Program: LDA 2001H                        ; Obtain the most significant BCD digit RLC                                    ; Rotate left  RLC                                    ; Rotate left  RLC                                    ; Rotate left  RLC                                    ; Rotate left...

Program to add the contents of two memory locations

Statement: Add the contents of memory locations 2000H and 2001H and place the result in the memory locations 2002H and 2003H. Example: (2000H) = C3H (2001H) = 29H Result = C3H + A9H = 016CH (2002H) = 6CH (2003H) = 01H Program: LXI H, 2000H                   ; HL points to location 2000H MOV A, M                        ; Move the contents of 2000H into accumulator INX H                                ; HL points to location 2001H ADD M                              ; Add the contents of 2001H with the contents of accumulator INX H                                ; HL points to location 2002H MOV M, A      ...

Program to subtract two 16-bit numbers

Statement: Subtract  the 16-bit number stored in memory locations 2002H and 2003H from the 16-bit number stored in memory locations 2000H and 2001H. The most significant bytes of the two numbers are stored in memory locations 2001H and 2003H. Store the result in memory locations 2004H and 2005H. The most significant byte is stored in memory location 2005H. Example: (2000H) = 19H (2001H) = 6AH (2002H) = 15H (2003H) = 5CH Result = 6A19H - 5C15H =0E04H (2004H) = 04H (2005H) = 0EH Program: LHLD 2000H                   ; Obtain the first 16-bit number in HL register pair XCHG                              ; Save the first 16-bit number in DE register pair LHLD 2002H                   ; Obtain the second 16-bit number in HL register pair MOV A, E            ...

Program to add two 16-bit numbers

Statement: Add the 16-bit number stored in memory locations 2000H and 2001H to the 16-bit number stored in memory locations 2002H and 2003H. The most significant bytes of the two numbers are stored in memory locations 2001H and 2003H. Store the result in memory locations 2004H and 2005H. The most significant byte is stored in memory location 2005H. Example: (2000H) = 21H (2001H) = 20H (2002H) = 34H (2003H) = 5AH Result = 2021H + 5A34H = 7A55H (2004H) = 55H (2005H) = 7AH Program 1 using 8-bit addition instructions: LHLD 2000H                   ; Obtain the first 16-bit number in HL register pair XCHG                              ; Save the first 16-bit number in DE register pair LHLD 2002H                   ; Obtain the second 16-bit number in HL register pair MOV A, E     ...

8085 Addressing Modes

Addressing modes: The different methods which are used to select or address the operands are called addressing modes or the different modes or ways that a microprocessor uses to access data are called addressing modes. There are five addressing modes: Immediate addressing mode Register addressing mode Direct addressing mode Indirect addressing mode Implied addressing mode Immediate addressing mode:  In this addressing mode, 8-bit data or 16-bit data is specified in instruction itself. These instructions can be either two byte or three byte instructions. The instructions containing 'I' indicates immediate addressing mode. Example:  MVI C, 31H LXI H, 3210H Register addressing mode: In this addressing mode, the source and destination operands are general purpose registers (B, C, D, E, H and L). These instructions are one byte instructions. Example:  MOV A, B PCHL Direct addressing mode:  In this addressing mode, the 16...

Instruction Formats

Instruction:   An instruction is a binary pattern which is designed inside a microprocessor to perform a specific function.  The entire group of instructions which determines what functions the microprocessor can perform is called the instruction set. Types of instruction: There are 3 types of instructions: One byte instruction Two byte instruction Three byte instruction One Byte Instruction: It includes the opcode and operand in the 8-bit only i.e. 1 byte only. For example: MOV A, B. Two Byte Instruction: It uses the first byte to indicate the opcode and second byte to indicate the 8-bit operand. So it requires two successive memory locations. For example: MVI C, 51H. Three Byte Instruction: It uses the first byte to indicate the opcode, second byte to indicate the lower order 8 bits of 16 bits data or address and third byte to indicate the higher order 8 bits of 16 bits data or address. For example: STA 3400H. NOTE:  The opcode ...

8085 Bus Organisation

The various units of a microprocessor are connected by three sets of parallel conducting lines called buses. There are three buses in microprocessor: Data bus Address bus Control bus 8085 Bus Organisation Data Bus:  8085 microprocessor has 8-bit data bus. This means that it can carry the 8-bit data starting from 00H to FFH. It is bidirectional. This means that these lines are used to flow data in both the directions. Data can be transferred or received through these lines. It also connects the I/O ports and CPU. It has 8 parallel lines of data bus i.e. it can access upto 2^8 = 256 data lines. Address Bus: 8085 microprocessor has 16-bit address bus. The CPU sends the address of the memory location over this bus. So the address bus carries the address of the memory location on which data is to written or from which data is to read. It is unidirectional. This means that these lines are used to flow data only in one direction i.e. from microprocessor to...

Program to exchange the contents of two memory locations

Statement: Exchange the contents of memory locations 2000H and 2001H. Example:  Initially, (2000H) = 34H (2001H) = 20H After exchanging, (2000H) = 20H (2001H) = 34H Program 1 using direct addressing instructions: LDA 2000H               ; Get the contents of location 2000H into accumulator MOV B, A                  ; Move the contents of accumulator into register B LDA 2001H                ; Get the contents of location 2001H into accumulator STA 2000H                 ; Store the contents of accumulator into location 2000H MOV A, B                  ; Move the contents of register B into accumulator STA 2001H                 ; Store the contents of accumulator into location 2001H HLT  ...

Program to find the 2's complement of a number

Statement: Find the 2's complement of the number stored at memory location 2000H and store the complemented number at memory location 2001H. Example: (2000H) = 34H (2001H) = CBH + 01H = CCH Program: LDA 2000H                   ; Obtain the number from location 2000H CMA                              ; Complement the number ADI 01H                        ; Add one to the complemented number STA 2001H                    ; Store the result at location 2001H HLT                                ; Terminate program execution

Program to find the 1's complement of a number

Statement: Find the 1's complement of the number stored at memory location 2000H and store the complemented number at memory location 2001H. Example: (2000H) = 34H (2001H) = CBH Program: LDA 2000H              ; Obtain the number from location 2000H CMA                         ; Complement the number STA 2001H               ; Store the result at location 2001H HLT                           ; Terminate program execution

Important use of W and Z Registers

W and Z Registers:  These are temporary registers of 8085. These registers are used to hold 8-bit data during execution of some instructions. 8085 uses these registers internally. These are not available for programmer. Use of W and Z Registers: CALL Instruction: Whenever the processor wants to execute a subprogram or subroutine, CALL instruction is used to transfer program control to that subroutine.  This instruction transfers the current PC contents onto the stack and loads the given address into PC.  This address is temporarily stored in the W and Z registers. XCHG Instruction: This instruction exchanges the contents of H with D and L with E.  At the time of exchange, W and Z registers are used as temporary registers.